Principal Analog IC Design Engineers

Kforce's client, a rapidly growing semiconductor company, is seeking Principal Analog IC Design Engineers. This onsite role involves leading the design of next-generation transimpedance amplifiers (TIAs) operating at multi-tens of GHz, integrated with high-performance equalizers for coherent long-haul, metro systems, and PAM4 data center applications. Responsibilities include active circuit design, developing millimeter-wave transmission line structures, and creating high-performance broadband analog circuits for optical front-end receivers, along with supporting analog blocks. The position requires collaboration on post-silicon validation and customer engagement.

Must Have

• Drive active circuit design and provide technical leadership.
• Design advanced TIAs using SiGe BiCMOS and FinFET CMOS technologies.
• Develop millimeter-wave transmission line structures.
• Create high-performance broadband analog circuits for optical front-end receivers.
• Design supporting analog blocks (linear regulators, AGC loops, sensors, bandgap references).
• Define microarchitecture for major circuit blocks.
• Collaborate on post-silicon validation, qualification, mass production, and customer engagement.
• Bachelor's degree in Electrical Engineering with 8-12+ years experience (or Master's/PhD with 5-8+ years).
• Proven track record in chip tape-out and lab evaluation of high-performance receivers.
• Proficiency with EDA CAD tools.
• Hands-on IC performance measurement/debugging.
• Strong foundation in transistor-level design, device physics, and control/feedback loop stability analysis.

Good to Have

• Expertise in multiple technologies (SiGe BiCMOS, FinFET CMOS).
• Experience designing physical layer ICs for high-speed optical fiber data communication.
• Leadership experience mentoring junior designers and serving as chip lead.
• Successful history of taking chips to mass production.
• Ability to translate chip-level specifications into architectural designs.
• Analog custom layout experience.
• AGC loop design.
• High-precision analog circuits (linear regulators, current sensors, bandgaps, drivers, DAC/ADC).
• Continuous-time linear equalizers.

Perks & Benefits

• Medical/dental/vision insurance
• HSA
• FSA
• 401(k)
• Life, disability & ADD insurance
• Paid time off (for salaried personnel)
• Paid sick leave (for hourly employees on Service Contract Act project)

Overview:

Join our team to lead the design of next-generation transimpedance amplifiers (TIAs) operating at multi-tens of GHz. These optical interface chips, integrated with our high-performance equalizers, set the industry standard for coherent long-haul, metro systems, and PAM4 data center applications.

Key Responsibilities:

• Drive active circuit design and provide technical leadership across projects
• Design advanced TIAs using SiGe BiCMOS and FinFET CMOS technologies, achieving performance beyond industry benchmarks
• Develop millimeter-wave transmission line structures for superior signal integrity
• Create high-performance broadband analog circuits for optical front-end receivers
• Design supporting analog blocks such as linear regulators, AGC loops, sensors, and bandgap references
• Define microarchitecture for major circuit blocks and guide implementation by the design team
• Collaborate cross-functionally on post-silicon validation, qualification, mass production, and customer engagement

Requirements:

• Bachelor's degree in Electrical Engineering with 8-12+ years of relevant experience, or Master's/PhD with 5-8+ years in high-performance RF/Analog Receiver, TIA, Driver, or RFIC design
• Proven track record in chip tape-out and lab evaluation of high-performance receivers
• Proficiency with EDA CAD tools and hands-on IC performance measurement/debugging
• Strong foundation in transistor-level design, device physics, and control/feedback loop stability analysis

Preferred Skills:

• Expertise in multiple technologies, especially SiGe BiCMOS and FinFET CMOS
• Experience designing physical layer ICs for high-speed optical fiber data communication
• Leadership experience mentoring junior designers and serving as chip lead
• Successful history of taking chips to mass production
• Ability to translate chip-level specifications into architectural designs
• Analog custom layout experience

Bonus Expertise:

• AGC loop design
• High-precision analog circuits (linear regulators, current sensors, bandgaps, drivers, DAC/ADC)
• Continuous-time linear equalizers

The pay range is the lowest to highest compensation we reasonably in good faith believe we would pay at posting for this role. We may ultimately pay more or less than this range. Employee pay is based on factors like relevant education, qualifications, certifications, experience, skills, seniority, location, performance, union contract and business needs. This range may be modified in the future.

We offer comprehensive benefits including medical/dental/vision insurance, HSA, FSA, 401(k), and life, disability & ADD insurance to eligible employees. Salaried personnel receive paid time off. Hourly employees are not eligible for paid time off unless required by law. Hourly employees on a Service Contract Act project are eligible for paid sick leave.

Note: Pay is not considered compensation until it is earned, vested and determinable. The amount and availability of any compensation remains in Kforce's sole discretion unless and until paid and may be modified in its discretion consistent with the law.

This job is not eligible for bonuses, incentives or commissions.

Kforce is an Equal Opportunity/Affirmative Action Employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, pregnancy, sexual orientation, gender identity, national origin, age, protected veteran status, or disability status.

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